The present invention relates generally to RF (radio frequency) transceivers including circuitry for providing both reduced power consumption and increased dynamic range and accuracy, and more particularly to on-chip self test circuitry and methodology for reducing power consumption by automatically correcting for resonance frequency errors caused by integrated circuit process variation and the Q factor error caused by chip temperature variation.
FIG. 1 illustrates an RF transceiver 1 including a typical low-power RF front end circuit 2 coupled by an impedance matching network 4 to an antenna 5. A modem 14 is coupled to a quadrature-phase signal channel Q of RF front end circuit 2 by means of a delta sigma ADC (analog to digital converter) 24Q and is coupled, in a in-phase signal channel 1 of RF front end circuit 2 by means of another delta sigma ADC 24I. A power management circuit 22 provides accurate DC voltages and DC currents required in RF front end circuit 2.
RF front end transceiver circuit 2 includes LNA (low noise amplifier) 3 having its input coupled by conductor 6 to impedance matching network 4 and a first output coupled by a conductor 7A to a first input of each of mixers 8 and 9. A second output of LNA 3 is connected by conductor 7B to a second input of each of mixers 8 and 9. A third input of each of mixers 8 and 9 is connected by a 2-conductor bus 17I (because the in-phase signal I conducted thereby is a differential signal) to receive the in-phase “I” signal generated by a frequency synthesizer 16, and a fourth input of each of mixers 8 and 9 is connected by a 2-conductor bus 17Q to receive a quadrature-phase “Q” signal generated by frequency synthesizer 16. The I and Q channels are phase shifted by 90 degrees from each other. Both mixers 8 and 9 receive differential signals from LNA 3 and operate on one of the local oscillator (LO) phases. For example, mixer 8 can operate with the I phase while mixer 9 operates from the Q phase. In a direct up-conversion transmitter part of a transceiver, information contained within a limited bandwidth of the I and Q phases is multiplied by a signal generation network and summed to create a single sideband. In the receiver part of the transceiver, the received signal is down-converted with respect to the signal generation network.
The differential output produced by mixer 8 is provided as an input to a low pass filter 10I, the output of which is coupled to the differential input of sigma delta ADC (analog to digital converter) 24I, and the differential output produced by mixer 9 is provided as an input to a low pass filter 10Q, the output of which is coupled to the differential input of sigma delta ADC 24Q. An output of modem 14 is connected by a digital bus 15 to an input of frequency synthesizer 16. An analog output of frequency synthesizer 16 is connected by conductor 18 to an input of an adjustable gain pre-power amplifier (PPA) or power amplifier (PA) driver 20A, the output of which is connected to the input of a convention power amplifier (PA). The output of power amplifier 20B is connected by conductor 21 to impedance matching network 4.
Modern transceivers usually provide the above mentioned “in-phase” RF signal I and an RF “quadrature-phase” signal Q which is 90 degrees out of phase relative to the in-phase I signal. At resonance, the phase shift caused by the high impedance of a resonating tank circuit structure is zero, and due to the down-conversion of the orthogonal phase I and Q signals, one of them provides a maximum output amplitude while the other provides a minimum or null amplitude. RF transceiver “front end” circuitry generally is narrow-band in nature and depends heavily on the performance of integrated resonator circuits (also referred to as “tank circuits” or “resonators”).
RF transceiver systems require narrow band circuits which include resonating LC tank circuits or resonators. While the inductance of a tank circuit is greatly dependent on the geometry of the inductors therein, the tank circuit capacitance varies greatly over temperature and process “corners” (i.e., maximum and minimum values of temperature and process parameters) for modern integrated circuit silicon technologies. (Integrated circuit manufacturing foundries generally utilize processes with worst-case variations that are within 3-sigma levels.)
The resonance frequency of an L/C tank circuit is given by fc=1/sqrt(LC), where “sqrt (LC) means “square root of LC”. With integrated circuit process variations, the value of the inductance L remains approximately constant as it is dependent on the inductor geometry, while the capacitance C exhibits a significant amount of process-dependent variation. Usually, to create minimum distortion in the signal processing at RF frequencies, linear capacitors are used which provide low voltage coefficients, and these linear capacitors exhibit large process variation. Therefore, the center frequency errors are caused more by the capacitance variation. On the other hand, the quality factor Q of an inductor of inductance L is defined by the ratio of its inductive impedance to its resistive impedance, and is given by Q=(2×π×fc×L)/r, where fc is the resonance frequency and r is the series resistance of the inductor. The series resistance “r” is the resistance of a metal resistor, and varies significantly over temperature. The impedance of a parallel resonating tank circuit is given as Z=2×π×fc×L×Q. For example, with a typical 0.39% per degree C temperature coefficient for copper metallization, the variation of metal resistance over a range of 125 degrees (typical industrial operating range is ˜40° C. to 85° C.) would be 48.75% (125×0.0039). Therefore, when the frequency errors are calibrated out, the temperature dependent effects can lead to as much as a 50% variation in signal amplitude.
Thus, although the inductors of the tank circuits provide significant advantages to improving dynamic range per unit current consumption, some calibration/compensation is needed to optimize its performance. At the present state-of-the-art, most on-chip resonant tank frequency centering is performed utilizing production testing that requires a substantial amount of equipment cost and test time. The subsequently described invention provides built-in self-calibration to address both problems.
LC impedance matching networks are usually configured to provide a series resonance and are designed to provide an optimum impedance conversion between the antenna and the integrated circuit chip, and are dependent on the values of inductance and capacitance of the LC impedance matching network, and there respective unloaded quality factors Q. Although large inductors required for low frequency operation must be located “off-chip” because of their large physical size and their relatively large amount of resistance, small inductors for high-frequency applications are commonly included “on-chip”.
Prior attempts to reduce variations in the resonant frequency of integrated circuit transceiver tank circuits usually have reduced the quality factor Q of the tank circuits. (The quality factor Q is a tank circuit parameter which represents the ratio between the amount of the energy stored in the tank circuit and the amount of energy dissipated in it. A decrease in the Q factor of a tank circuit increases its current consumption and therefore degrades filtering at RF frequencies. Furthermore, these problems become more severe in transceivers that have wide operating bandwidths.) Increasing the Q factor of a tank circuit results in more effective tuning and reduces current consumption of RF circuits with almost zero DC voltage drop, which in turn results in improved RF signal receiving and transmitting capability in a transceiver. Increasing the Q factor also improves the dynamic range of a transceiver, resulting in improved signal-to-noise ratios of various transceiver components and generally improving the maximum signal-representing capability and minimum signal-representing capability of system in which the transceiver is included.
Degradation of signal filtering in a transceiver at RF frequencies may be caused by reduction of the Q factor of on-chip tank circuits which occurs as a result of variation in chip manufacturing processes and variation in chip temperature. For example, if the receiver portion of a transceiver is designed to operate at 2.4 GHz, but the integrated circuit manufacturing process variation results in the resonance frequency of a tank circuit actually being centered at 2.6 GHz, it may be necessary to somehow shift the tank circuit resonance frequency down from 2.6 GHz to the required 2.4 GHz. It should be appreciated that a receiver signal reduction of as little as 5 or 6 dB can be very undesirable or even catastrophic, especially for low-power designs in which a few hundred microamperes of current is very significant.
Unfortunately, there has been no practical way of achieving the above-mentioned shift of a tank circuit resonance frequency needed to correct an erroneous value of the resonance frequency caused by the integrated circuit manufacturing process variation and the chip temperature variation.
Transceivers typically include mixers, which can be represented as analog multipliers. A mixer can be configured as either a frequency down-converter or a frequency up-converter. A mixer configured as a down-converter operates to convert a received high frequency RF signal to a low frequency signal without loss of any information. This may allow information contained in the received RF signal to be down-converted and digitally processed at a much lower frequency. Similarly, a mixer configured as an up-converter operates to convert a low frequency signal to a corresponding high frequency signal without loss of any information, for example to up-convert information generated of relatively low signal frequency to a much higher frequency so it may be transmitted as an RF signal.
Thus, there is an unmet need for a circuit and method which avoid increase in power consumption and reduction of dynamic range of a transceiver due to variation in the resonant frequency of conventional integrated circuit resonators or tank circuits.
There also is an unmet need for a circuit and method which avoid increase in power consumption and reduction of dynamic range of a transceiver due to variation in the resonant frequency of conventional integrated circuit resonators or tank circuits caused by variations in the quality factor Q of the resonators or tank circuits due to variation in integrated circuit process parameters and/or chip temperature.
There also is an unmet need for a low-cost calibration circuit and method which improve dynamic range per unit current consumption in low power transceivers.
There also is an unmet need for a circuit and method which avoid problems due to drift in the resonance frequency of on-chip tank circuits.
There also is an unmet need for a way of providing built-in-self calibration of on-chip tank circuits that requires very little integrated circuit chip area.
There is also an unmet need of a way of providing in-situ calibration of an on-chip tank circuit wherein the tank circuit itself, rather than a replica thereof, is tested, with minimum loading on the main tank circuit signal.